Cache Placement
Where the caches are placed in relationship to the hyperthreads(超级线程), cores, and processors is not under control of the programmer.
But programmers can determine(确认) where the th...
Critical Word Load(关键词加载)
Memory is transferred from the main memory into the caches in blocks which are smaller than the cache line size.
Today 64 bits are transferred at once and the cache line...
Cache Miss Factors
We have already seen that when memory accesses miss the caches the costs skyrocket(飞涨).
Sometimes this is not avoidable and it is important to understand the actual costs and w...
Instruction Cache
Not just the data used by the processor is cached;
the instructions executed by the processor are also cached.
However, this cache is much less problematic(问题) than the data ca...
Other Details
So far we talked about the address as consisting of threeparts, tag, set index, and cache line offset.
But what address is actually used? All relevant processors today provide virtu...
Special Case: Hyper-Threads
Hyper-Threads (sometimes called Symmetric Multi-Threading(对称多线程), SMT) are implemented by the CPU and are a special case since the individual threads(单个线程) cannot reall...
Multi Threaded Access
Multi Threaded Access To ensure that the gravity(重力) of the problems introduced by concurrently using the same cache lines on different processors is understood, we will look...
回顾
In the previous section we have already pointed out the problem we have when multiple processors come into play.
Even multi-core processors have the problem for those cache levels which are no...