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Memory 内存知识-28-多线程优化之并发
Multi-Thread Optimizations When it comes to multi-threading, there are three different aspects of cache use which are important: Concurrency Atomicity Bandwidth T...2019-05-10 03:08:59 | Memory
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Memory 内存知识-28-多线程优化之带宽
Bandwidth Considerations When many threads are used, and they do not cause cache contention by using the same cache lines on different cores, there still are potential（潜在的） problems. Each process...2019-05-10 03:08:59 | Memory
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Memory 内存知识-28-多线程优化之原子性
Atomicity Optimizations If multiple threads modify the same memory location concurrently, processors do not guarantee any specific result（处理器不保证任何特定结果）. This is a deliberate（商榷） decision made to ...2019-05-10 03:08:59 | Memory
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Memory 内存知识-27-Prefetch 预取
Prefetching 目的 The purpose of prefetching is to hide the latency of a memory access. 直接预取，可以隐藏内存访问的延迟。 The command pipeline and out-of-order (OOO) execution capabilities of today’s processors c...2019-05-10 03:08:59 | Memory
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Memory 内存知识-26-024-TLB 访问优化
Optimizing TLB Usage There are two kinds of optimization of TLB usage. 降低程序使用的 page 数量 The first optimization is to reduce the number of pages a program has to use. This automatically results i...2019-05-10 03:08:59 | Memory
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Memory 内存知识-26-023-L2 缓存优化
Optimizing Level 2 and Higher Cache Access Everything said about optimizations for level 1 caches also applies to level 2 and higher cache accesses. ps: 优化的思想是相通的。 补充内容 There are two additional...2019-05-10 03:08:59 | Memory
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Memory 内存知识-26-021-实战技巧之 Cache L1 指令优化
优化 L1 指令 Preparing code for good L1i use needs similar techniques as good L1d use. The problem is, though, that the programmer usually does not directly influence the way L1i is used unless s/he ...2019-05-10 03:08:59 | Memory
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Memory 内存知识-26-021-实战技巧之 Cache L1 优化
Cache Access Programmers wishing to improve their programs’ performance will find it best to focus on changes affected the level 1 cache since those will likely yield the best results. We will di...2019-05-10 03:08:59 | Memory
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